Features

l  Operating Data Rate up to 4.25Gbps

l  Single 3.3V Power Supply and CML Logic Interface

l  850nm VESCL transmitter and high performance PIN receiver

l  Link Distance up to 300m with 50/125µm multi-mode fiber

l  Low EMI and excellent ESD protection

l  Built-in Digital Diagnostic Monitoring (DDM) function,Compliant with SFF-8472

l  Operating Case Temperature

Standard(C):     0℃~+70℃

l  Industrial(I):  -40℃~+85℃

Applications

l  1.063/2.125/4.25Gbps Fiber Channel

l  Other optical Links

General

The GIGAC's GACS-8548-02x series  is a multi-rate 850nm SFP which ensures compliance to 4.25Gbps Fibre Channel specifications without the need for Rate Select. mode transceiver is small form factor pluggable module for serial optical data communications such as IEEE 802.3ae . It is with the SFP 20-pin connector to allow hot plug capability. This module is designed for multi-mode fiber and operates at a nominal wavelength of 850nm. The transmitter section uses a 850nm VCSEL  laser and is a class 1 laser compliant according to International Safety Standard IEC-60825.

Order Information

Table 1-Order Information

Note: 1. Case Temperature

Note: 2. “MMF” stands for 50/125µm MMF

Absolute Maximum Ratings

Table 2-Absolute Maximum Ratings

*Exceeding any one of these values may destroy the device immediately.

Operating Environment

Table 3-Operating Environment

Electrical Characteristics

Table 4-Electrical Characteristics

Note:

1. Internally AC coupled, input termination may be required for CML applications. 

2. Internally AC coupled, CML differential output stage.

Optical Characteristics

Table 5-GACS-8548-02/GACS-8548-02I, SFP 4.25G 300m

Note 1.Coupled into 50/125 MMF.

Note 2.Measured with PRBS 2^31-1 test pattern @4.25Gbps.BER=10E-12

Note 3.LOS Hysteresis, See Figure1

Figure 1  LOS Hysteresis

Recommended Host Board Power Supply Circuit

Figure 2  Recommended Host Board Power Supply Circuit

Recommended Interface Circuit 

Figure 3  Recommended Interface Circuit

Pin arrangement

Figure 4  Pin arrangement

Figure 5  Pin View

Table 6-Connector Pin Assignment

Note:

1.TX Fault is open collector output which should be pulled up externally with a 4.7K ~10KΩ resistor   on the host board to voltage between 2.0V and VCC+0.3V. Logic 0 indicates normal operation; logic 1 indicates a laser fault of some kind. In the low state, the output will be pulled to less than 0.8V.

2.TX Disable input is used to shut down the laser output per the state table below. It is pulled up within the module with a 4.7~ 10K resistor.

         Low (0- 0.8V):                             Transmitter on

         Between (0.8V and 2V):                              Undefined

         High (2.0 – VccT):                                Transmitter Disabled

3.MOD-DEF 0, 1, 2. These are the module definition pins. They should be pulled up with a 4.7~10K resistor on the host board to supply less than VccT+0.3V or VccR+0.3V.

MOD-DEF 0 is grounded by the module to indicate that the module is present.

MOD-DEF 1 is clock line of two wire serial interface for optional serial ID.

MOD-DEF 2 is data line of two wire serial interface for optional serial ID.

4.LOS (Loss of signal) is an open collector output, which should be pulled up with a 4.7k~10kΩ resistor on the host board to a voltage between 2.0V and Vcc+0.3V. Logic 0 indicates normal operation; logic 1 indicates loss of signal. In the low state, the output will be pulled to less than 0.8V.

5.These are the differential receiver outputs. They are AC-coupled 100Ω differential lines which should be terminated with 100Ω differential at the user SERDES. The AC coupling is done inside the module and thus not required on the host board.

6.These are the differential transmitter inputs. They are AC-coupled, differential lines with 100Ω differential termination inside the module.

Digital Diagnostic Memory Map

The SFP series defines a 256-byte memory map in EEPROM describing the transceiver’s capabilities, standard interfaces, manufacturer, and other information, which is accessible over a 2 wire serial interface at the 8-bit address 1010000X (A0h),see Figure. The memory contents refer to SFF-8472 Rev 9.5. A2 EEPROM Definition Specific settings please consult our engineer.

Figure 6  Memory Map

Mechanical Information

Figure 7  LC interface package

Regulatory Information

Table 7-List of Regulatory Compliance

Notice

Gigac reserves the right to make changes to or discontinue any optical link product or service identified in this publication, without notice, in order to improve design and/or performance. Applications that are described herein for any of the optical link products are for illustrative purposes only. Gigac makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Revision History

Contact

Add: Area 3-502, Haolang technology Park,

NO.2666, Konggang Four Road, Shuangliu district, 610207 Chengdu, China

Tel: (+86) 028-85124518

Fax: (+86) 028-85154518

Postal: 610207

E-mail: sales@gigac.com

Website: http://www.gigac.com

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